Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.) Filing date Publication date Application filed by Xilinx Inc filed Critical Xilinx Inc Priority to US10/051,222 priority Critical patent/US7058120B1/en Assigned to XILINX, INC. Original Assignee Xilinx Inc Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hossain Current Assignee (The listed assignees may be inaccurate. Nix Ahmed Younis Michael Ren Kent Yvette P. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.) Active, expires Application number US10/051,222 Inventor Jinghui Lu Shahriar Rokhsaz Stephen D.
HIGH SPEED PARALLEL TO SERIAL CONVERTER PDF
Google Patents Integrated high-speed serial-to-parallel and parallel-to-serial transceiverĭownload PDF Info Publication number US7058120B1 US7058120B1 US10/051,222 US5122202A US7058120B1 US 7058120 B1 US7058120 B1 US 7058120B1 US 5122202 A US5122202 A US 5122202A US 7058120 B1 US7058120 B1 US 7058120B1 Authority US United States Prior art keywords serial operably coupled parallel data clock Prior art date Legal status (The legal status is an assumption and is not a legal conclusion.
Google Patents US7058120B1 - Integrated high-speed serial-to-parallel and parallel-to-serial transceiver US7058120B1 - Integrated high-speed serial-to-parallel and parallel-to-serial transceiver
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